Abstract：In traditional cascaded multilevel converters, problems include a large number of devices, high running loss, and low power density. Recently, some methods have been proposed to reduce the size of the device by optimizing the cascaded topology. At the same time, as the technology of high-performance SiC power devices matures, the method of mixing SiC devices and Si devices provides a new way to improve converter efficiency. Therefore, a hybrid cascaded multilevel converter (HCMC) topology based on Si and SiC devices is proposed. In addition, A specific high-frequency and low-frequency hybrid modulation strategy is proposed for HCMC topology, which fully utilizes the advantages of low switching loss of SiC MOSFET and low on-state loss of Si IGBT. The proposed control strategy can greatly reduce the loss of the device while ensuring the topology output performance. Firstly, the HCMC topology can be divided into a neutral point clamped (NPC) three-level unit and a cascaded H-bridge (CHB) unit. Among them, one bridge arm in the CHB high-frequency sub-module uses a SiC MOSFET device, and other power devices in the topology are Si IGBTs. Secondly, the high and low frequency hybrid modulation strategy arranges the modulation strategies of different switching frequencies into corresponding modules to make the NPC unit outputs three-level square waves, the CHB low-frequency sub-module outputs multilevel staircase waves, and the CHB high-frequency sub-module outputs high-frequency PWM waves. Third, the relationship between the DC side voltage of the NPC unit and the maximum output voltage of the CHB units in the topology is analyzed. Therefore, the minimum conditions for the number of sub-modules of CHB units under different voltage levels are solved. Finally, the energy fluctuation of the high-frequency sub-module is quantitatively analyzed. An alternate voltage balancing control strategy is proposed to stabilize the capacitor voltage of the CHB high-frequency sub-module. To further verify the feasibility and effectiveness of the HCMC topology, modulation strategy, and alternate voltage balancing control strategy, the simulation and experiments are carried out in a 6 kV system. In terms of device loss, the total losses of HCMC topology and typical multilevel topology at different equivalent switching frequencies are compared in the Matlab/Simulink and PLECS co-simulation platform. When the compensation capacity of the converter is 3 Mvar and the equivalent switching frequency of the output voltage is 20 kHz, the HCMC reduces the total loss by 44.9 % compared with the traditional CHB topology. Moreover, with the increase of the equivalent switching frequency, HCMC has a greater advantage in reducing running losses. In terms of the number of devices, the total number of HCMC devices has been reduced by more than half compared with the traditional CHB topology. In addition, the traditional CHB topology is all high-frequency devices, and the HCMC topology only contains six high-frequency devices and the rest are all low-frequency devices. The following conclusions can be drawn from the simulation and experimental analysis: (1) The proposed HCMC combines different structural modules. When only one NPC unit is added, the number of full-bridge sub-modules of HCMC is reduced by 2/3, and the number of devices is reduced by more than half compared with the traditional CHB topology. (2) The proposed high and low frequency hybrid modulation strategy concentrates most of the switching action in the SiC MOSFET device, which gives full play to the advantages of the low open loss of Si IGBT and low switching loss of SiC MOSFET. (3) The proposed alternate voltage balancing control strategy achieves good stability of the DC side voltages of the NPC and CHB units.
任鹏, 涂春鸣, 侯玉超, 郭祺, 王鑫. 基于Si和SiC器件的混合型级联多电平变换器及其调控优化方法[J]. 电工技术学报, 2023, 38(18): 5017-5028.
Ren Peng, Tu Chunming, Hou Yuchao, Guo Qi, Wang Xin. Research on a Hybrid Cascaded Multilevel Converter Based on Si and SiC Device and Its Control Optimization Method. Transactions of China Electrotechnical Society, 2023, 38(18): 5017-5028.
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2023, Vol. 38 
