双面散热功率模块的低电感多端集成电容

doi:10.19595/j.cnki.1000-6753.tces.220510

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摘要

双面散热功率模块能有效提升逆变器的功率密度,成为车用电机控制器的发展趋势。为了匹配双面散热功率模块的超低寄生电感,急需高性能的低电感集成电容。然而,现有集成电容存在构-效机理不明、基础模型缺失和设计方法匮乏等问题,成为限制双面散热功率模块性能的关键技术瓶颈。该文结合功率器件的开关工作机制,基于场-路映射分析方法,采用有限元仿真工具,揭示集成电容的磁场分布和电流路径规律,建立集成电容的寄生电感模型,理论模型和仿真结果之间的误差小于16 %。为了降低集成电容的寄生电感,衍生了六种集成电容的设计结构,揭示端子布局与寄生电感之间的构-效规律,提出多端集成电容的概念,寄生电感约为32 nH,可以降低47 %的寄生电感和21 %的电压过冲。对标商业化集成电容产品,实验结果验证了所提多端集成电容在开关损耗、关断电压、能量密度等性能方面的技术优势。该文的研究,为低电感集成电容提供了新的模型方法,为高功率密度车用电机控制器提供了新的研究思路。

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关键词 ：双面散热功率模块, 低寄生电感, 多端集成电容, 端子优化布局

Abstract：

The power density of inverters can be effectively boosted by double-sided cooling (DSC) power modules, which has become the trend for automotive motor controllers. To match the ultra-low parasitic inductance of double-sided heat sink power modules, there is an urgent need for high-performance, low- inductance integrated capacitors. However, the structure-efficiency mechanism of existing integrated capacitors needs to be clarified. The lack of fundamental models and design methodologies restricts the performance of double-sided thermal power modules. This paper analyzes in depth the field-way-mapped analysis model, low-inductance layout mechanism, and multi-ended integration design approach of integrated capacitors to overcome these issues.
First, the parasitic inductance model of the integrated capacitor is derived from the switching state of the device and the current distribution of the DC link. Secondly, a field-way-mapped model of the single-ended integrated capacitor is created using the finite element analysis (FEA) tool. Based on the current path and magnetic field distribution of the DC link, its parasitic inductance distribution law is disclosed. Thirdly, current path regulation and coupled magnetic field optimization offers the concept of multi-ended integrated capacitors, which greatly minimizes the parasitic inductance of integrated capacitors. Using actual measurement data of a double-sided heat dissipation power module with commercial integrated capacitor products as a benchmark, the feasibility and effectiveness of the basic concept and design process are validated. Finally, the fundamental concept and design methodology provided in this study are verified using real measurement results of a double-sided heat dissipation power module with a commercially available integrated capacitor product as a control group.
The simulation results demonstrate that the parasitic inductance theoretical model using the field- way-mapped analysis method has an error of less than 16 %. The experimental results show that the multi-ended integrated capacitor has lower parasitic inductance and turn-off overvoltage than the single-ended I-type integrated capacitor. The parasitic inductance is decreased by 47 %, and the turn-off overvoltage is decreased by 21 %. The integrated capacitor prototype created in this work has a reduced parasitic inductance of 32 nH for the entire device, which has excellent performance potential and design advantages over commercial integrated capacitor solutions that call for specialized packaging.
The following conclusions can be drawn from this paper: (1) The switching state of the power device is connected to the parasitic inductance of the integrated capacitor. (2) The parasitic inductance of integrated capacitors is related to the space layout of the terminal. Multi-ended integrated capacitors and strategic approaches are proposed to reduce parasitic inductance by multi-ended design. (3) Multi-ended integrated capacitors are used to achieve an optimized layout of terminals, and multiple film capacitors are connected in parallel. Accordingly, the parasitic inductance of integrated capacitors and the turn-off overvoltage of power devices can be reduced based on the phase elimination of magnetic fields and the shortening of power loops. This paper provides a new modeling strategy for low-inductance integrated capacitors and a new line of inquiry for high-power density motor controllers for automobiles.

Key words： Double-sided cooling power module low parasitic inductance multi-ended integrated capacitor optimal layout of terminal

收稿日期: 2022-04-05

PACS:

TM464

基金资助:

国家自然科学基金项目（52177169）和重庆市研究生科研创新训练项目（CYB21016）资助

通讯作者: 曾正男,1986年生,博士,副教授,研究方向为新型电力电子器件封装集成与应用。E-mail: zengerzheng@126.com

作者简介: 余跃男,1996年生,硕士,研究方向为新型电力电子器件封装集成与应用。E-mail: 2716095972@qq.com

引用本文:

余跃, 邹铭锐, 曾正, 孙鹏, 姜克. 双面散热功率模块的低电感多端集成电容[J]. 电工技术学报, 2023, 38(8): 2100-2115. Yu Yue, Zou Mingrui, Zeng Zheng, Sun Peng, Jiang Ke. Low-Inductance Multi-Ended Integrated Capacitor for Double-Sided Cooling Power Module. Transactions of China Electrotechnical Society, 2023, 38(8): 2100-2115.

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