DC-Offset Elimination Method for Grid-Connected Phase-Locked Loop Based on Complex Notch Filter
Hui Nanmu1, Wang Dazhi1, Li Yunlu2
1. School of Information Science and Engineering Northeastern University Shenyang 110819 China; 2. School of Electrical Engineering Shenyang University of Technology Shenyang 110870 China
Abstract：In the three-phase grid-connected applications under ideal grid conditions, the synchronous reference frame phase-locked loop (SRF-PLL) is the most common synchronization technique. However, the presence of a DC offset can cause fundamental oscillation errors in the phase estimation. The common method to solve this problem is to use notch filter (NF) or delayed signal cancellation (DSC) in SRF-PLL, but these methods will reduce the dynamic response speed of the system. In this paper, based on the complex domain analysis of the multi-complex-coefficient filter (MCCF), a fast DC offset rejection method using a complex notch filter (DCCNF) for three-phase PLL is proposed, and the parameter design guidelines of the proposed PLL are given. The proposed new DCCNF-based PLL has a fast response speed and good DC offset elimination performance. The simulation and experimental results verify the effectiveness of the proposed method.
回楠木, 王大志, 李云路. 基于复变陷波器的并网锁相环直流偏移消除方法[J]. 电工技术学报, 2018, 33(24): 5897-5906.
Hui Nanmu, Wang Dazhi, Li Yunlu. DC-Offset Elimination Method for Grid-Connected Phase-Locked Loop Based on Complex Notch Filter. Transactions of China Electrotechnical Society, 2018, 33(24): 5897-5906.
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2018, Vol. 33 
