基于漏源电压脉冲检测的SiC MOSFET短路检测电路

doi:10.19595/j.cnki.1000-6753.tces.250978

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摘要作为新兴宽禁带半导体器件,SiC MOSFET广泛应用于电力电子变流器中。而快速且准确的短路检测是确保SiC MOSFET安全稳定运行的必要条件。首先,该文分析了在硬开关故障与负载短路故障时SiC MOSFET瞬态特性变化,在此基础上,提出一种基于漏源电压脉冲检测的SiC MOSFET短路检测电路。然后,通过检测SiC MOSFET开通瞬态过程中漏源电压负向脉冲实现硬开关故障报警;通过监测静态导通过程中漏源电压正向脉冲实现负载短路故障报警。最后,在给出检测电路设计方法与其器件选型方法的基础上,制作样机并搭建实验平台,对应用该检测电路的不同规格SiC MOSFET在发生硬开关故障、负载短路故障及直通短路故障时的短路检测性能进行测试。结果表明,针对具有不同开关特性的SiC MOSFET,所提检测电路具有检测时间可调、检测速度快的优点,且其参数整定简便、设计难度低,适用于多种电流规格与封装的SiC MOSFET。

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关键词 ： SiC MOSFET, 短路检测, 漏源电压, 脉冲监测

Abstract：The pursuit of lower on-resistance and higher thermal conductivity in SiC MOSFETs, achieved through a reduced chip area compared to comparable silicon (Si) IGBTs, renders them susceptible to intensified electro-thermal stress during short-circuit (SC). Their short-circuit withstand time (SCWT) is limited to 2 μs to 8.5 μs, inversely depending on junction temperature, gate-source voltage (V_GS), and drain-source voltage (V_DS). Moreover, prolonged SC exposure leads to gate-oxide degradation, a rightward shift in transfer characteristics, and compromised dynamic performance in SiC MOSFETs. However, SC detection methods for SiC MOSFETs based on parameters such as V_DS, drain current (I_D), the slope of I_D (dI_D/dt), gate current (I_G), power loss, and the slope of V_DS (dV_DS/dt) often suffer from drawbacks, including difficult parameter setting, limited response speed, package constraints, and circuit complexity. Their practical implementation is heavily dependent on application conditions, often requiring complex, case-specific parameter tuning.
This paper proposes a novel SC detection method for SiC MOSFETs based on V_DS pulse monitoring. It identifies a hard switching fault (HSF) by monitoring the presence or absence of the negative V_DS pulse during the turn-on transient. A fault under load (FUL) is diagnosed by detecting the presence of the positive V_DS pulse during the steady conduction period. The parameter tuning for the proposed HSF detection relies on the normal turn-on transient of the SiC MOSFET, ensuring a non-destructive selection of the protection threshold and response time. The FUL detection response time is primarily determined by the VDS rise speed, and a multi-level logic-based judgment effectively prevents false alarms. In practice, the circuit requires no Kelvin-source connection, minimizes the number of integration points with power modules, and exhibits minimal bus-voltage dependence. Furthermore, as the detection circuit shares the same reference potential as the SiC MOSFET to which it is connected in parallel, it eliminates the need for high-voltage isolation or high-bandwidth components, resulting in a low-cost, simple structure. This paper elaborates on the operational principle of the proposed SC detection circuit and presents the methodology for selecting its components. It also analyzes the impact of main circuit parasitic parameters on detection accuracy and reliability.
An experimental prototype was fabricated and evaluated on the SC test platform using two types of SiC MOSFETs under different DC bus voltages. The results demonstrate that for a high-current (25 A) device, the circuit achieves response times of 185 ns for a hard-switching fault (HSF) and 178 ns for a fault under load (FUL). When applied to a low-current (7 A) MOSFET, these times are reduced to 82 ns and 64 ns, respectively. Furthermore, tests confirm that the detection response time remains independent of the DC bus voltage within a range from 300 V to 500 V, thereby greatly simplifying parameter tuning in practical applications. Finally, the detection circuit's performance is also validated under a bridge-arm shoot-through fault scenario. The alarm waveforms captured for two series-connected SiC MOSFETs under different SC conditions attest to their suitability for complex fault scenarios.

Key words： SiC MOSFET short-circuit detection drain-source voltage pulse monitoring

收稿日期: 2025-06-06

PACS:

TM46

基金资助:中央高校基本科研业务费（3132024108）、中国博士后科学基金（2023M740462）和国家自然科学基金（52471374）资助项目

通讯作者: 薛征宇男,1972年生,博士,副教授,研究方向为电力电子与电力传动、电力系统及其故障诊断。E-mail: xuezy@dlmu.edu.cn

作者简介: 周野男,1987年生,博士,讲师,研究方向为功率开关器件驱动、保护及串并联应用。E-mail: 308744199@163.com

引用本文:

周野, 薛征宇, 鲜亮, 庹玉龙. 基于漏源电压脉冲检测的SiC MOSFET短路检测电路[J]. 电工技术学报, 2026, 41(10): 3314-3326. Zhou Ye, Xue Zhengyu, Xian Liang, Tuo Yulong. A Short-Circuit Detection Circuit for SiC MOSFET Based on Drain-Source Voltage Pulse Monitoring. Transactions of China Electrotechnical Society, 2026, 41(10): 3314-3326.

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