Abstract：This paper presents an optimized algorithm of three-level space vector PWM suitable for hardware implementation. The proposed algorithm accomplishes all the computation of three-level SVPWM algorithm in one sector by taking use of the geometrical symmetry of the space-vector diagram of the three-level topology, which reduces the computation amount of three-level SVPWM. Thus it reduces the hardware resources required by hardware implementation of the algorithm. Based on the proposed algorithm, the paper realizes the three-level SVPWM on a single field programmable gate array device using the hardware description language. The paper also gives the detailed design procedures and some key design considerations. Simulation and experimental results are given to verify the correctness of the proposed algorithm and quickness of the designed hardware.
胡海兵, 姚文熙, 吕征宇. 三电平空间矢量调制的FPGA实现[J]. 电工技术学报, 2010, 25(5): 116-122.
Hu Haibing, Yao Wenxi, Lü Zhengyu. Realization of Three Level SVPWM Using FPGA. Transactions of China Electrotechnical Society, 2010, 25(5): 116-122.
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2010, Vol. 25 
