Wide-Gain-Range CLLLC Resonant Converter with Hybrid Modulation of Pulse-Frequency-Phase-Shift and Efficient Synchronous Rectification Method
Yang Zhiqing1,2, Zhan Jiyang1,2, Qi Xianbin1,2, Wu Zhouyu1,2, Li Helong1,2
1. Anhui Province Key Laboratory of Semiconductor Packaging and Reliability Hefei University of Technology Hefei 230009 China; 2. State Key Laboratory of High-Efficiency and High-Quality Conversion for Electric Power Hefei University of Technology Hefei 230009 China
Abstract：CLLLC resonant converters, integrating the high efficiency of LLC converters and the bidirectional operation capability of DAB converters, have become a research focus in electric vehicle (EV) on-board charger (OBC) applications due to their excellent soft-switching performance, high efficiency, high power density, and bidirectional operation features. To address the requirements for wide-voltage gain under wide-load conditions and high efficiency in OBC scenarios, this paper proposes a hybrid modulation strategy combining pulse-frequency modulation (PFM) and inner-phase-shift modulation (IPSM), along with a digital- analog hybrid synchronous rectification (SR) method. The first-harmonic approximation (FHA) model is established to analyze the operating principles and characteristics of PFM and IPSM. The converter's voltage gain expressions under both modulation modes are derived, and the necessary conditions for ZVS are clarified. Based on the modal analysis of the turn-off process under IPSM, the hard-switching mechanism of a conventional PFM-IPSM hybrid modulation under heavy-load and low-gain conditions is revealed. Specifically, under heavy loads and low gain, the resonant current at the turn-off moment of lagging switches is insufficient to fully charge and discharge the parasitic capacitors, resulting in a loss of ZVS. Thus, the switching boundary of the two modulation modes is optimized. By adjusting the switching boundary, the converter can be prevented from entering the ZVS loss region. Furthermore, based on the sufficient conditions for ZVS, the minimum dead time required under IPSM is deduced. Considering the parasitic capacitance of power switches, turn-off delay time, and resonant parameters, the dead time is set to 160 ns. Accordingly, ZVS is achieved across a wide range of operating conditions. For the SR challenges in hybrid modulation, the effects of switching frequency, phase-shift angle, and load on the SR turn-on timing are analyzed. In the over-resonant mode, the secondary resonant current does not reverse polarity when the primary switches are turned on. Hence, a turn-on delay angle is necessary for SR switches to avoid a large circulating current. A digital-analog hybrid SR method based on turn-on delay is proposed. The turn-on timing of secondary switches is determined by a polynomial-fitted delay angle relative to the primary switches. At the same time, the turn-off signal is generated by the comparator subsystem (CMPSS) in the DSP, detecting the zero-crossing of the secondary resonant current. This method reduces hardware complexity and ensures accurate and reliable operation of SR. In addition, the main types of power losses in the converter are analyzed. The power-loss distribution and converter efficiencies are studied under different operating conditions using an electro-thermal joint-simulation model built in PLECS. A 1.65 kW CLLLC experimental prototype was built. Results show stable operation across a voltage gain range of 0.67 to 1.5 and ZVS under light and heavy load conditions. In addition, modulation mode switching is smooth, and the SR method achieves precise turn-on timing, reducing circulating currents. The system efficiency is up to 97.6%.
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2026, Vol. 41 
