Abstract：A dead time should be considered in a PWM gate signal in order to avoid the short-circuit of inverter legs. Such a dead time causes some problems such as output voltage and current waveforms distortion. Based on the analysis of the effect of eliminating the dead-time, this paper proposes a novel dead time elimination method for single phase full bridge inverter which employs the three-level PWM control strategy. The presented method can eliminate the dead time clearly and implement a smooth transition through the whole cycle without a precise current polarity detection circuit. In addition, by using the IA as the search method for finding the optimal control sequences accord with the no dead time rules, the algorithm can optimize the quality of an output current waveform. Furthermore, an experimental platform based on DSP and FPGA is built. The simulation and experimental results verify the best dead time elimination control sequences generated by IA compared with the existing conventional control strategies, not only effectively and safely eliminate the effect of dead time, but also significantly reduce the THD of the output waveform.
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2013, Vol. 28 
