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| Degradation of SiC MOSFET Body Diode Under Pulse Current Stress |
| Zhang Haoran1, Cai Yumeng1, Sun Peng1, Chen Yong2,3, Zhao Zhibin1 |
1. State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources North China Electric Power University Beijing 102206 China;
2. Zhuhai Power Supply Bureau of Guangdong Power Grid Co. Ltd Zhuhai 519000 China;
3. DC Power Distribution and Consumption Technology Research Center of Guangdong Power Grid Co. Ltd Zhuhai 519000 China |
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Abstract The bipolar degradation phenomenon hinders the application of silicon carbide (SiC) MOSFET body diodes and restricts the development of high-voltage, high-power SiC MOSFET devices. Investigating stress-equivalent evaluation methods for bipolar degradation in converter applications and understanding its degradation characteristics are essential for guiding SiC device applications and enhancing the operational reliability of devices and systems.
Building upon existing reliability testing standards, this paper proposes a pulse current stress-regulated equivalent evaluation method for bipolar degradation in SiC MOSFET body diodes. Through experimental investigations, the effects of pulse current level, junction temperature, and pulse width on bipolar degradation were systematically characterized. Experimental results reveal that significant bipolar degradation occurs when both pulse current level and junction temperature approach their rated limits simultaneously, with degradation severity increasing with pulse width. However, negligible degradation was observed under two conditions: low pulse current with high junction temperature and high pulse current with low junction temperature.
For SiC device development, two implementation strategies are recommended: (1) Adopting rated pulse current levels and junction temperatures as standard evaluation conditions, with iterative process optimization until bipolar degradation is eliminated under these rated parameters; (2) Utilizing experimentally derived allowable thresholds for pulse current and junction temperature as reference benchmarks for rating calibration. In practical applications, three critical countermeasures should be implemented. First, avoid operating body diodes under concurrent high-current pulses and elevated junction temperatures. Enhanced thermal management should be employed for surge current scenarios to prevent junction temperature from approaching rated limits. Second, implement co-optimization of circuit topology, gate driving, and protection mechanisms to minimize body diode overcurrent levels, thereby suppressing bipolar degradation and improving thermal utilization efficiency. Third, the pulse width in the control logic design should be strategically reduced to mitigate degradation effects. These comprehensive solutions provide valuable technical references for suppressing bipolar degradation and advancing the industrialization of high-reliability SiC power devices.
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Received: 03 February 2025
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2025, Vol. 40 
