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| Low-Parasitic-Inductance SiC Power Modules with A Double-Sided Layout |
| Ma Haohao1,2, Yang Yuan1, Guo Sunyu1, Santiago Cobreces2, Li Yan3,4 |
1. School of Automation and Information Engineering Xi’an University of Technology Xi’an 710048 China;
2. Electronics Department University of Alcala Madrid 28805 Spain;
3. School of Mechanichal and Precision Instrument Engineering Xi’an University of Technology Xi’an 710048 China;
4. Xinjiang Institute of Engineering Urumqi 830023 China |
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Abstract Silicon carbide (SiC) power modules are susceptible to parasitic inductance due to their high switching speed, with larger parasitic inductance exacerbating electrical stress and increasing switching losses. This paper proposes a novel SiC power module structure with a dual-sided layout, utilizing the structural characteristics of the direct bonded copper (DBC) substrate. By evenly distributing the power devices and interconnects on the upper and lower copper layers, the design achieves a symmetrical layout that maximizes mutual inductance effects and significantly reduces parasitic inductance. Additionally, the introduction of vias to create three-dimensional (3D) current paths effectively overcomes the limitations of traditional two-dimensional (2D) packaging, enhancing space utilization. Simulation and experimental results demonstrate that this structure significantly reduces parasitic inductance, optimizes dynamic characteristics, and improves power density. Moreover, a high-current surge test further verifies the reliability of the manufacturing process and the feasibility of large-scale production. The main contributions of this paper are as follows.
(1) A dual-sided layout power module was proposed to minimize parasitic inductance in the power loop. The design evenly distributes power devices across the top and bottom copper layers of the DBC substrate, taking full advantage of the ceramic layer's insulating properties and mutual inductance cancellation effects. This approach effectively reduces parasitic inductance and the 50% substrate area, significantly increasing power density.
(2) A via-based interconnection structure was presented, establishing electrical connectivity between the upper and lower bridge arms, effectively suppressing parasitic inductance and improving thermal stability. By creating vias in the DBC substrate, an electrical connection between the upper and lower copper layers is achieved, replacing the traditional bonding wire interconnection method. This further mitigates parasitic inductance. Additionally, the via design helps to relieve thermal stresses generated by thermal expansion, thus improving the module's thermal stability.
(3) An innovative power terminal optimization scheme was presented to reduce parasitic inductance. A solution is introduced where the nuts are directly soldered onto the DBC substrate as power terminals. This design optimizes the external electrical connection path and reduces the parasitic inductance at the power terminals.
(4) This paper comprehensively evaluates the proposed dual-sided layout power module through simulation using ANSYS Q3D, double-pulse testing, and extensive current surge testing. The Ansys Q3D simulation results indicate that, compared to traditional 2D bonding wire packaging, the dual-sided layout structure reduces parasitic inductance by 95%. Double-pulse testing demonstrates the advantages of this structure in dynamic characteristics, with a 37% reduction in voltage overshoot and a 14% decrease in switching losses compared to commercial modules. A high-current surge test was conducted to test the module's manufacturing process's reliability based on the first-class short circuit testing principle. The module, with a rated voltage of 1.2 kV and a current rating of 100 A, withstands a surge current of 1.135 kA at 900 V, demonstrating the module’s reliability under extreme conditions.
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Received: 25 October 2024
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[1] Emon A I, Hassan M U, Mirza A B, et al.A figure of merit for SiC MOSFET power modules to achieve high-power-density energy conversion[J]. IEEE Transa- ctions on Electron Devices, 2023, 70(7): 3718-3725.
[2] Wu Yuanchao, Wang Hui, Zhuang Yizhan, et al.A shared charging channel for power and auxiliary batteries in electric vehicles[J]. IEEE Transactions on Industrial Electronics, 2024, 71(7): 8199-8203.
[3] Bi Yuxuan, Wu Chao, Xu Junzhong, et al.An integrated power decoupling method for single-phase EV onboard charger in V2G application[J]. IEEE Transactions on Power Electronics, 2023, 38(8): 9635-9646.
[4] Zhang Yun, Gao Shenghan, Jing Shihong, et al.Soft-switching operation with a variable switching frequency control for switched-quasi-z-source bidi- rectional DC-DC converter in EVs[J]. IEEE Transa- ctions on Industrial Electronics, 2023, 70(1): 384-395.
[5] Wang Cun, Zheng Pengfei, Bauman J.A review of electric vehicle auxiliary power modules: challenges, topologies, and future trends[J]. IEEE Transactions on Power Electronics, 2023, 38(9): 11233-11244.
[6] Kieu H P, Nguyen D B H, Choi S. An all-in-one magnetic structure for entire ZVS range auxiliary power module in electrical vehicles[J]. IEEE Transa- ctions on Power Electronics, 2024, 39(10): 13336-13347.
[7] Sun Peng, Zou Mingrui, Niu Fuli, et al.Dynamic deformation oriented thermo-mechanical performance assessment for automotive power module with various PWM schemes[J]. IEEE Transactions on Power Electronics, 2023, 38(9): 10906-10916.
[8] 马荣耀, 唐开锋, 潘效飞, 等. 车用碳化硅功率模块的电热性能优化与评估[J]. 电源学报, 2024, 22(3): 78-86.
Ma Rongyao, Tang Kaifeng, Pan Xiaofei, et al.Electro-thermal performance optimization and evalu- ation of automotive SiC power module[J]. Journal of Power Supply, 2024, 22(3): 78-86.
[9] Han Lubin, Liang Lin, Kang Yong, et al.A review of SiC IGBT: models, fabrications, characteristics, and applications[J]. IEEE Transactions on Power Elec- tronics, 2021, 36(2): 2080-2093.
[10] Yuan Xibo, Laird I, Walder S.Opportunities, challenges, and potential solutions in the application of fast-switching SiC power devices and converters[J]. IEEE Transactions on Power Electronics, 2021, 36(4): 3925-3945.
[11] Ma Haohao, Yang Yuan, Wu Lei, et al.Review of the designs in low inductance SiC half-bridge packaging[J]. IET Power Electronics, 2022, 15(11): 989-1003.
[12] 张彤宇, 王来利, 苗昱, 等. 多芯片整体式Clip互连碳化硅功率模块反向耦合低感封装方法[J/OL]. 电工技术学报, 2025, https://doi.org/10.19595/j.cnki.1000-6753.tces.250153.
Zhang Tongy, Wang Laili, Miao Yu, et al. Multichip integral clip bonding SiC power module reverse coupling low inductance packaging method[J]. Transa- ctions of China Electrotechnical Society, 2025, https://doi.org/10.19595/j.cnki.1000-6753.tces.250153.
[13] 李恺颜, 曾正, 孙鹏, 等. 基于拓扑优化的车用功率模块 Pin-Fin 设计方法[J]. 电工技术学报, 2023, 38(18): 4963-4977, 4993.
Li Kaiyan, Zeng Zheng, Sun Peng, et al.Topology optimization design of Pin-Fin for automotive power module[J]. Transactions of China Electrotechnical Society, 2023, 38(18): 4963-4977, 4993.
[14] 王来利, 赵成, 张彤宇, 等. 碳化硅功率模块封装技术综述[J]. 电工技术学报, 2023, 38(18): 4947-4962.
Wang Laili, Zhao Cheng, Zhang Tongyu, et al.Review of packaging technology for silicon carbide power modules[J]. Transactions of China Electro- technical Society, 2023, 38(18): 4947-4962.
[15] 牛富丽, 曾正, 孙鹏, 等. 逆变器功率密度的极限分析与提升方法[J/OL]. 电工技术学报, 2025, 1-13 [2025-03-18]. https://doi.org/10.19595/j.cnki.1000-6753.tces.242054.
Niu Fuli, Zeng Zheng, Sun Peng, et al. Study on theoretical limitation and promotion routine of power density for inverter application[J/OL]. Transactions of China Electrotechnical Society, 2025, 1-13[2025-03- 18]. https://doi.org/10.19595/j.cnki.1000-6753.tces.242054.
[16] 盛况, 董泽政, 吴新科. 碳化硅功率器件封装关键技术综述及展望[J]. 中国电机工程学报, 2019, 39(19): 5576-5584, 5885.
Sheng Kuang, Dong Zezheng, Wu Xinke.Review and prospect of key packaging technologies for silicon carbide power devices[J]. Proceedings of the CSEE, 2019, 39(19): 5576-5584,5885.
[17] Lee H, Smet V, Tummala R.A review of SiC power module packaging technologies: challenges, advances, and emerging issues[J]. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2020, 8(1): 239-255.
[18] Hou Fengze, Wang Wenbo, Cao Liqiang, et al.Review of packaging schemes for power module[J]. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2020, 8(1): 223-238.
[19] Mueller C R, Bayerer R.Low-inductive inverter concept by 200 A/1200 V half bridge in an EasyPACK 2B-following strip-line design[C]//2014 8th Inter- national Conference on Integrated Power Electronics Systems, Nuremberg, Germany, 2014: 1-6.
[20] Meisser M, Hamilton D, Mawby P.DCB-based low-inductive SiC modules for high frequency operation[C]//2014 8th International Conference on Integrated Power Electronics Systems, Nuremberg, Germany, 2014: 1-10.
[21] Meisser M, Hamilton D, Blank T, et al.Low- inductive compact SiC power modules for high- frequency operation[C]//2014 International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, Nuremberg, Germany, 2014: 1-8.
[22] Chen Zheng, Yao Yiying, Zhang Wenli, et al.Development of a 1200 V, 120 A SiC MOSFET module for high-temperature and high-frequency applications[C]//2013 The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications, Columbus, OH, USA, 2013: 52-59.
[23] Seal S, Glover M D, Mantooth H A.3-D wire bondless switching cell using flip-chip-bonded silicon carbide power devices[J]. IEEE Transactions on Power Electronics, 2018, 33(10): 8553-8564.
[24] Kicin S, Traub F, Hartmann S, et al.A new concept of a high-current power module allowing paralleling of many SiC devices assembled exploiting conventional packaging technologies[C]///2016 28th International Symposium on Power Semiconductor Devices and ICs, Prague, Czech Republic, 2016: 467-470.
[25] DiMarino C M, Mouawad B, Johnson C M, et al. 10-kV SiC MOSFET power module with reduced common-mode noise and electric field[J]. IEEE Transactions on Power Electronics, 2020, 35(6): 6050-6060.
[26] DiMarino C, Mouawad B, Johnson C M, et al. Design and experimental validation of a wire-bond-less 10-kV SiC MOSFET power module[J]. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2020, 8(1): 381-394.
[27] Tanimoto S, Matsui K.High junction temperature and low parasitic inductance power module technology for compact power conversion systems[J]. IEEE Transa- ctions on Electron Devices, 2015, 62(2): 258-269.
[28] Beckedahl P, Buetow S, Maul A, et al.400 A, 1200 V SiC power module with 1nH commutation indu- ctance[C]//2016 9th International Conference on Integrated Power Electronics Systems, Nuremberg, Germany, 2016: 1-6.
[29] Huang Zhizhao, Chen Cai, Xie Yue, et al.A high- performance embedded SiC power module based on a DBC-stacked hybrid packaging structure[J]. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2020, 8(1): 351-366.
[30] Regnat G, Jeannin P O, Lefevre G, et al.Silicon carbide power chip on chip module based on embedded die technology with paralleled dies[C]//2015 IEEE Energy Conversion Congress and Expo- sition, Montreal, QC, Canada, 2015: 4913-4919. |
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2025, Vol. 40 
