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Abstract As a new solution, fault current limiter could be used to limit the short circuit current caused by the configuring large power supply in high load density networks and interconnections without changing the grid. In this paper, study on thyristor triggering and monitoring system is presented in detail. First, the principle and configuration of fault current limiter are presented. Then the configuration of thyristor triggering and monitoring system are presented with an emphasis on the principle and design scheme of triggering system, monitoring system and TE board. Next, a logic between VBE and TE board is proposed. Finally, the test data of low-voltage model is listed as a certification of its feasibility.
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Received: 15 November 2009
Published: 04 March 2014
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