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| Dynamic Current Balancing Method for Parallel SiC MOSFETs Based on Direct Source Interconnection Strategy |
| Chen Haobin1, Yan Haidong1, Ma Kai2, Guo Qing1, Sheng Kuang1 |
1. School of Electrical Engineering Zhejiang University Hangzhou 310000 China;
2. Guangdong Provincial Key Laboratory of Power Equipment Reliability Guangdong Electric Power Science Academe Guangzhou 510080 China |
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Abstract Driven by the increasing demand for high power, paralleling SiC MOSFETs emerge as a cost-effective and efficient solution to boost current capacity. Multichip SiC power modules with Kelvin-source connection are popular in applications requiring large capacity and high switching frequency, yet dynamic current imbalance persists as a prevalent challenge. As a result, the paralleled SiC MOSFET chips experience unbalanced losses and junction temperatures. In extreme cases, thermal runaway can occur, resulting in chip failure.
Existing dynamic current balancing methods will make the circuit more complex, difficult to design and implement, or increase costs. This paper proposes a method using direct source interconnection (DSI) between the source terminals of paralleled SiC MOSFET chips. By adjusting the DSI parameters, effective current balance can be readily attained. Compared to active methods, this method does not require complex sensors or processing circuits and remains fully compatible with traditional manufacturing techniques. Unlike conventional passive methods, it does not require additional passive components such as resistors, inductors, or capacitors, simplifying implementation and reducing costs. Moreover, it avoids the need for changes to the DBC layout and does not demand complex structural design or precise calculations.
The mechanism of dynamic current imbalance in paralleled SiC MOSFETs is derived through circuit modeling and mathematical analysis, considering both cases with and without the DSI method. The mechanism reveals the current coupling mechanism between the power loop and the drive loop of paralleled SiC MOSFETs under unbalanced power source parasitic inductance. Additionally, the differences in the drive loop and dynamic current caused by this coupling are obtained. In the derived mechanism, the key parameters affecting dynamic current imbalance are identified. The mechanism of action of the DSI dynamic current balancing method is explained. The DSI method effectively mitigates the current coupling between the power loop and the drive loop, thereby reducing differences in the drive loop and dynamic current. This results in a significant improvement in dynamic current imbalance. Furthermore, the method retains the benefits of the Kelvin-source connection, enhancing switching speed and reducing switching losses for the chips.
Simulations and experiments have verified the mechanism of dynamic current imbalance and the effectiveness of the proposed dynamic current balancing method. The results show that the proposed DSI method reduces the dynamic current difference and switching loss difference of paralleled SiC MOSFETs by at least 50%. Additionally, the method preserves the high efficiency of the power module, which features a Kelvin-source connection. Consequently, it provides the dual advantages of balanced current sharing and efficiency optimization.
Finally, the effectiveness of the DSI method is validated in the module with more parallel chips. The results show that in multichip parallel applications, the DSI method demonstrates significant performance advantages compared to the Kelvin-source connection. Moreover, the DSI method requires only a simple wire bonding process, without altering the power module layout or adding extra pins. Therefore, in high-power-density and high-frequency applications, the DSI method meets the dynamic current sharing requirements of multichip power modules while reducing implementation complexity and costs.
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Received: 22 January 2025
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2025, Vol. 40 
