电工技术学报  2024, Vol. 39 Issue (2): 567-579    DOI: 10.19595/j.cnki.1000-6753.tces.221770
电力电子 |
三相电压不平衡下DDSRF-PLL与DSOGI-PLL的锁相误差检测与补偿方法
祁永胜1,2, 李凯1, 高畅毓1, 薛腾跃1, 游小杰1
1.北京交通大学电气工程学院 北京 100044;
2.国网山西省电力公司忻州供电公司 忻州 034000
Phase Estimation Error Detection and Compensation Method of DDSRF-PLL and DSOGI-PLL under Three-Phase Voltage Unbalance
Qi Yongsheng1,2, Li Kai1, Gao Changyu1, Xue Tengyue1, You Xiaojie1
1. School of Electrical Engineering Beijing Jiaotong University Beijing 100044 China;
2. State Grid Shanxi Electric Power Company Xinzhou Subsidiary Xinzhou 034000 China
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摘要 由于高渗透的分布式电源、多样化的负荷类型以及电网故障等因素,并网点三相电压不仅存在幅值不平衡,而且会出现相位不平衡现象。这种情况下,广泛应用的解耦双同步坐标系锁相环(DDSRF-PLL)和双二阶广义积分器锁相环(DSOGI-PLL)无法获得精确的同步信息。为此,该文在论证这两种锁相环具有理论等价性的基础上,阐释三相电压不平衡与锁相误差的内在关系,进而提出一种锁相误差的补偿方法,实现幅值和相位不平衡下的准确锁相。所提方法仅需对电压采样值进行简单计算即可获得不平衡相位和锁相误差,实现开环相位补偿,无需修改原有锁相结构,具有良好的拓展性。最后,通过仿真和实验验证了所提方法的有效性。
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祁永胜
李凯
高畅毓
薛腾跃
游小杰
关键词 三相电压不平衡锁相环(PLL)不平衡相位检测锁相误差补偿    
Abstract:Due to the combined effect of high-permeability distributed power supply and various types of loads, the three-phase voltage of the actual grid-connected point has deviations in amplitude and phase angle. However, phase-locking methods based on single synchronous reference frame phase-locked loop (SSRF-PLL), such as decoupled double synchronous reference frame phase-locked loop (DDSRF-PLL) and double second-order generalized integrator phase-lock loop (DSOGI-PLL), generally ignored these differences, and, hence, only acquiring synchronization information at phase-balanced three-phase voltage. More is needed to support coordinated control among devices at the grid-connected point. Recently, some methods were presented to obtain phase information of three-phase voltage under phase unbalance, but most suffered from high computation costs and poor expansibility. Therefore, a compensation method for phase estimation error is proposed. The phase estimation error can be accurately compensated under phase-balanced three-phase voltage by detecting the unbalanced phase angle deviation of B and C phases.
Firstly, the three-phase unbalanced voltage specified in the national standard is used as the input signal for DDSRF-PLL and DSOGI-PLL, and the equivalent relationship between unbalanced voltage and phase estimation error of the two phase-locked loops is obtained. The functional relationship between phase estimation error and unbalanced phase angle deviation is based on steady-state characteristics. Secondly, three approximate solutions for the phase estimation errors are given to simplify the calculation. Then, based on the zero-crossing point of the A phase, the unbalanced phase angle deviation of B and C phases is obtained by calculating the sample value of three-phase voltage. Finally, precise compensation of phase estimation error can be achieved by substituting the phase angle deviation in the function of phase estimation error, overlaying the output of phase estimation error to the original PLL reversely. The phase angle deviation detection and phase estimation error compensation method can realize open-loop compensation with a low computation cost and good expandability.
Simulation results under eight conditions of phase angle deviation show that the estimated phase curves of two PLLs always coincide when the unbalanced phase angle deviation of B and C phases change within the range of [-30 ° 30 °]. The maximum error between theoretical and simulation values is 0.230 °, and the relative error is only 2.3 %. It proves the rationality of the theoretical equivalence of two PLLs and the validity of the relationship between unbalanced phase angle deviation and phase estimation error. The results also show that the maximum delay time decreased from 1.126 ms to 28 μs, and the corresponding phase estimation error reduced from 20.268 ° to 0.501 °, indicating the method's high compensation accuracy. The experimental results also have similar conclusions. After the accurate compensation and three approximate methods, the phase estimation error was reduced from 1.425 ms to 75 μs, 250 μs, 325 μs, and 225 μs, respectively. The approximate method has a compromise between compensation accuracy and calculation burden.
The following conclusions can be drawn from the simulation and experimental results: (1) DDSRF-PLL and DSOGI-PLL are theoretically equivalent at phase-unbalanced three-phase voltage. (2) The relationship between phase estimation error and phase angle deviation is derived based on the steady-state characteristics of SSRF-PLL, which is suitable for a series of phase-locked methods based on SSRF-PLL and has a wide range of applications. (3) The proposed phase angle deviation detection and phase estimation error compensation method can realize open-loop compensation by simply calculating the sample value of three-phase voltage, which has the characteristics of low computational cost, easy expansion, and high compensation accuracy.
Key wordsThree-phase voltage unbalance    phase-locked loop (PLL)    phase angle deviation detection    phase estimation error compensation   
收稿日期: 2022-09-17     
PACS: TM46  
基金资助:国家自然科学基金资助项目(52007005)
通讯作者: 李凯, 男,1988年生,副教授,硕士生导师,研究方向为电力电子与电力传动、电气工程。E-mail: kaili@bjtu.edu.cn   
作者简介: 祁永胜, 男,1995年生,硕士研究生,研究方向为电能质量治理、并网变换器控制技术。E-mail: 19121484@bjtu.edu.cn
引用本文:   
祁永胜, 李凯, 高畅毓, 薛腾跃, 游小杰. 三相电压不平衡下DDSRF-PLL与DSOGI-PLL的锁相误差检测与补偿方法[J]. 电工技术学报, 2024, 39(2): 567-579. Qi Yongsheng, Li Kai, Gao Changyu, Xue Tengyue, You Xiaojie. Phase Estimation Error Detection and Compensation Method of DDSRF-PLL and DSOGI-PLL under Three-Phase Voltage Unbalance. Transactions of China Electrotechnical Society, 2024, 39(2): 567-579.
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