Enhanced Phased-Locked Loop Technology with Anti Harmonic Interference Capability for Distributed Generation in Low-Voltage Distribution
Liu Chuang1, Pan Daidong1, Cai Guowei1, Zhang Zhonglin2
1. School of Electrical Engineering Northeast Dianli University Jilin 132012 China; 2. State Grid Jinzhou Electric Power Supply Company Jinzhou 121000 China
Abstract:A large number of residential distributed sources connected to low-voltage distribution will cause issues such as voltage sag, frequency mutation, phase mutation and harmonics. In turn these issues will affect the phase-locked loop (PLL) of the distributed generation, leading to inaccurate detection of voltage phase and frequency. This paper analyzes three kinds of PLL techniques based on different structures, i. e. power-based PLL (P-PLL), Pseudolinear-enhanced PLL (PL-EPLL), second-order generalized integrator-PLL (SOGI-PLL). It is shown that the PL-EPLL fails to track the system voltage due to the harmonics of voltage or dc components. Thus a developed enhanced phased-locked loop (EPLL) method with anti harmonic interference capability is presented, based on band-pass filter. Finally, experimental and simulation results have verified the developed method. Compared with other three kinds of phase-locked loop, the proposed method is more suitable for low voltage distribution network with distributed power generations.
刘闯, 潘岱栋, 蔡国伟, 张忠林. 适合低压配电网分布式发电的抗谐波干扰型增强锁相环路技术[J]. 电工技术学报, 2016, 31(10): 185-192.
Liu Chuang, Pan Daidong, Cai Guowei, Zhang Zhonglin. Enhanced Phased-Locked Loop Technology with Anti Harmonic Interference Capability for Distributed Generation in Low-Voltage Distribution. Transactions of China Electrotechnical Society, 2016, 31(10): 185-192.
[1] 赵瑞杰, 田素立, 代兴华, 等. 一种利于DSP实现的改进型电网电压软锁相环的研究[J]. 电力系统保护与控制, 2013, 41(15): 135-141. Zhao Ruijie, Tian Suli, Dai Xinghua, et al. Research of an improved soft phase-locked loop for grid voltage which is easier to implement on the DSP[J]. Power System Protection and Control, 2013, 41(15): 135-141. [2] 王颢雄, 马伟明, 肖飞, 等. 双dq变换软件锁相环的数学模型研究[J]. 电工技术学报, 2011, 26(7): 237-241. Wang Haoxiong, Ma Weiming, Xiao Fei, et al. Study of model of software phase locked-loop based on dual-dq synchronous transform[J]. Transactions of China Electrotechnical Society, 2011, 26(7): 237-241. [3] 孙浩, 袁慧梅. 基于FPGA的三相锁相环的优化设计方案[J]. 电力系统保护与控制, 2009, 37 (10): 98-101. Sun Hao, Yuan Huimei. Optimized implementation scheme of three phase phase-locked loop based on FPGA[J]. Power System Protection and Control, 2009, 37(10): 98-101. [4] 龚锦霞, 解大, 张延迟. 三相数字锁相环的原理及性[J]. 电工技术学报, 2009, 24(10): 94-99. Gong Jinxia, Xie Da, Zhang Yanchi. Principle and performance of the three-phase digital phase-locked loop[J]. Transactions of China Electrotechnical Society, 2009, 24(10): 94-99. [5] Hwang S H, Liu L, Li L, et al. Offset error compensation for synchronous reference frame PLL in single-phase grid-connected converters[J]. IEEE Transactions on Power Electronic, 2012, 27(8): 3467- 3471. [6] 张志霞, 朴在林, 郭丹, 等. 一种应用于电力系统的锁相环[J]. 电工技术学报, 2012, 27(2): 250-254. Zhang Zhixia, Piao Zailin, Guo Dan, et al. A kind of phase-locked loop for power system[J]. Transa- ctions of China Electrotechnical Society, 2012, 27(2): 250-254. [7] 侯世英, 张诣. 电压频率偏移条件下新型锁相环在三相电压型PWM整流器中的应用[J]. 电力系统保护与控制, 2011, 39(17): 74-79. Hou Shiying, Zhang Yi. The application of the novel phase-locked loop in three-phase voltage source PWM rectifier under frequency offset of voltage[J]. Power System Protection and Control, 2011, 39(17): 74-79. [8] 张治俊, 李辉, 张煦, 等. 基于单/双同步坐标系的软件锁相环建模和仿真[J]. 电力系统保护与控制, 2011, 39(11): 138-144. Zhang Zhijun, Li Hui, Zhang Xu, et al. Simulation and modelling of software phase-locked loop based on single/double synchronous coordinate system[J]. Power System Protection and Control, 2011, 39(11): 138-144. [9] Karimi-Ghartemani M. Linear, pseudolinear enhanced phased-locked loop (EPLL) structures[J]. IEEE Transactions on Industrial Electronics, 2014, 61(3): 1464-1474. [10] 杜雄, 刘延东, 孙鹏菊, 等. 消除直流分量影响的并网变流器同步参考坐标系锁相环方法[J]. 电工技术学报, 2013, 28(12): 24-31. Du Xiong, Liu Yandong, Sun Pengju, et al. SRF-PLL method of grid-tied converter for eliminating the influence of DC components[J]. Transactions of China Electrotechnical Society, 2013, 28(12): 24-31. [11] Mojiri M, Karimi-Ghartemani M, Bakhshai S A. Processing of harmonics and interharmonics using an adaptive notch filter[J]. IEEE Transactions on Power Delivery, 2010, 25(2): 534-542. [12] 蒋连钿, 张明, 庄革, 等. 三相PWM整流器中基于虚拟无功的锁相环[J]. 电工技术学报, 2013, 28(8): 212-217. Jiang Liandian, Zhang Ming, Zhuang Ge, et al. A phase-locked loop method for three-phase PWM rectifier based on virtual reactive power[J]. Transa- ctions of China Electrotechnical Society, 2013, 28(8): 212-217. [13] 洪小圆, 吕征宇. 基于同步参考坐标系的三相数字锁相环[J]. 电工技术学报, 2012, 27(11): 203-210. Hong Xiaoyuan, Lü Zhengyu. Three-phase digital phase-locked loop based on synchronous reference frame[J]. Transactions of China Electrotechnical Society, 2012, 27(11): 203-210. [14] 刘扬, 谭国俊. 基于改进型自适应锁相环的特定次谐波补偿算法在APF中的应用[J]. 电工技术学报, 2013, 28(5): 259-264. Liu Yang, Tan Guojun. Specific harmonic com- pensation algorithm based on self-adaptive rein- forced phase lock loop for APF[J]. Transactions of China Electrotechnical Society, 2013, 28(5): 259- 264. [15] Karimi-Ghartemani M, Khajehoddin S A, Jain P, et al. Addressing DC component in PLL and notch filter algorithms[J]. IEEE Transactions on Power Elec- tronic, 2012, 27(1): 78-86.