基于载波和空间矢量调制之间联系的多电平VSI降低和消除共模电压的PWM策略

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Abstract A pulse-width modulation scheme for a multi-level voltage inverter with reduced and eliminated common-mode voltage is proposed in this paper. By choosing proper voltage vector, the common mode voltage could be reduced to one third of voltage of one DC cell by using partial common mode voltage reduce PWM(PCMVPWM), and could be eliminated entirely by using full common mode voltage reduce PWM(FCMVPWM). The relationship between the two PWM strategies and carrier based PWM strategy is investigated. The strategies are confirmed by both simulation and experimental results using neutral point clamped three-level inverter. Finally the algorithm is extended to any level inverter in the modulation.

Key words： Multi-level voltage source inverter common mode voltage pulse width modulation

Received: 19 December 2012 Published: 13 April 2015

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TM464

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	Articles by authors
	She Yangyang
	Yang Bowang
	Wu Zhiqing
	Li Wangmin
	Jiang Weidong

Cite this article:

She Yangyang,Yang Bowang,Wu Zhiqing等. PWM Algorithm for Multi-level VSI with Reduced and Eliminated Common Mode Voltage Based on Relationship between CBPWM and SVPWM[J]. Transactions of China Electrotechnical Society, 2015, 30(4): 171-178.

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http://dgjsxb.ces-transaction.com/EN/ OR http://dgjsxb.ces-transaction.com/EN/Y2015/V30/I4/171

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