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| A Harmonic Energy Metering Algorithm Suitable for VLSI Implementations |
| Men Changyou, Tan Nick |
| Zhejiang University Hangzhou 310027 China |
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Abstract In this paper a harmonic energy metering algorithm suitable for very large scale integrated circuit (VLSI) implementation is proposed. By taking into consideration of the distribution of the energy, filters with different orders to process the fundamental and harmonics are used. All the digital filters can track the change of the fundamental frequency by a feed forward system. It solves frequency leakage (thus metering error) problem associated with frequency variations that fast Fourier transform (FFT) has. Comparing to the wavelet packet decomposition, the proposed algorithm is more area efficient because of fewer filters are needed. Simulations and hardware verifications show that a metering accuracy of 0.1% for the fundamental and of 1% for the harmonics even with the frequency varying by ±5% can be achieved. The algorithm is implemented in a chip that is currently in prototyping.
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Received: 11 January 2008
Published: 18 February 2014
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2009, Vol. 24 
