|
|
|
| Realization of Three Level SVPWM Using FPGA |
| Hu Haibing1, Yao Wenxi2, Lü Zhengyu2 |
| 1. Nanjing University of Aeronautics and Astronautics Nanjing 210016 China 2. Zhejiang University Hangzhou 310027 China |
|
|
|
|
Abstract This paper presents an optimized algorithm of three-level space vector PWM suitable for hardware implementation. The proposed algorithm accomplishes all the computation of three-level SVPWM algorithm in one sector by taking use of the geometrical symmetry of the space-vector diagram of the three-level topology, which reduces the computation amount of three-level SVPWM. Thus it reduces the hardware resources required by hardware implementation of the algorithm. Based on the proposed algorithm, the paper realizes the three-level SVPWM on a single field programmable gate array device using the hardware description language. The paper also gives the detailed design procedures and some key design considerations. Simulation and experimental results are given to verify the correctness of the proposed algorithm and quickness of the designed hardware.
|
|
Received: 20 January 2009
Published: 04 March 2014
|
|
|
|
|
|
[1] Soto D, Green T C. A comparison of high-power converter topologies for the implementation of FACT controllers[J]. IEEE Transactions on Industrial Electronics, 2002, 49(5): 1072-1080.
[2] Peng Fangzheng. A generalized multilevel inverter topology with self voltage balancing[J]. IEEE Transactions on Industry Applications, 2001, 37(2): 611-618.
[3] Lai Jih Sheng, Peng Fangzheng. Multilevel converters-a new breed of power converters[J]. IEEE Transactions on Industry Applications, 1996, 32(3): 509-517.
[4] Jae Hyeong Seo, Chang Ho Choi, Dong Seok Hyun. A new simplified space-vector PWM method for three-level inverters[J]. IEEE Transactions on Power Electronics, 2001, 16(4): 545-550.
[5] Thomas Bruckner, Donald Grahame Holmes. Optimal pulse-width modulation for three-level inverters[J]. IEEE Transactions on Power Electronics, 2005, 20(1): 82-89.
[6] Subrata K Mondal, Bimal K Bose, Valentin Oleschuk. Space vector pulse width modulation of three-level inverter extending operation into overmodulation region[J]. IEEE Transactions on Power Electronics, 2003, 18(2): 604-611.
[7] Yao Wenxi, Lu Zhengyu, Fei Wanming. Three-level SVPWM method based on two-level PWM cell in DSP[C]. Applied Power Electronics Conference and Exposition, 2004: 1720-1724.
[8] Song Q, Liu W, Yan G. DSP-based universal space vector modulator for multi-level voltage-source inverters[C]. Industrial Electronics Conference, 2003: 1727-1732.
[9] Yao Wenxi, Hu Haibing, Lü Zhengyu, et al. Research on three-level inverter of six-phase synchronous motor[C]. International Power Electronics and Motion Control Conference, 2006, 2: 937-941.
[10] Tzou Ying Yu, Hsu Hau Jean. FPGA realization of space-vector PWM control IC for three-phase PWM inverters[J]. IEEE Transactions on Power Electronics, 1997, 12(6): 953-963.
[11] Zhou Zhaoyong, Li Tiecai, Takahashi Toshio. Design of a universal space vector PWM controller based on FPGA[C]. Applied Power Electronics Conference and Exposition, 2004: 1698-1702.
[12] 林平, 胡长生, 李明峰, 等. 基于模型参考自适应系统算法的速度估算核的研制[J]. 中国电机工程学报, 2004, 24(1): 118-123.
[13] Sandro Ferreira, Felipe Haffner, Luis Fernando Pereira, et al. Design and prototyping of direct torque control of induction motors in FPGAs[C]. Proceedings of the 16th Symposium on Integrated Circuits and Systems Design 2003, 2003: 105-110.
[14] Nabae A, Takahashi I, Akagi H. A new neural-point-clamped PWM inverter[J]. IEEE Transactions on Industry Applications, 1981, 17(5): 518-523. |
|
|
|
2010, Vol. 25 
