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Effect of Sampling Delay and Error on Direct Power Control Performance of Three-Level PWM Rectifier and Its Restraining Method |
Lu Ting1, Zhao Zhengming1, Zhang Yingchao2, Yuan Liqiang1 |
1. The State Key Laboratory of Power System Tsinghua University Beijing 100084 China 2. Chongqing Communication Institute Chongqing 400035 China |
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Abstract In applications of power electronic converters, the delay and error in sampling are sometime main factors which limit the control performance. This paper investigates this problem on a three-level pulse width modulation (PWM) rectifier with direct power control, analyzes the influences on direct power control (DPC) performance caused by sampling delay and error in detail. Based on the characteristics of various physical quantities and their carriers in sampling system, the method for reducing the sampling delay and restraining the sampling error is proposed in order to optimize the control performance. By implementing the method, the steady-state performance of the rectifier improves remarkably. Experimental results verify the validity and feasibility of the proposed method.
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Received: 15 February 2009
Published: 04 March 2014
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