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| A Hybrid Modulation Method for Four-Level Neutral Point Clamped Inverters Considering Neutral-Point Voltage Balance and Efficiency Optimization |
| Wang Yu, Chen Jianfei, Li Chengzhi, Chi Jiaqi, Li Hongda |
| State Key Laboratory of Power Grid Environmental Protection School of Electrical Engineering and Automation Wuhan University Wuhan 430072 China |
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Abstract Four-level neutral-point-clamped (4L-NPC) inverters are widely employed in medium- and high-voltage power conversion systems due to their low harmonic distortion, reduced device voltage stress, and high conversion efficiency. Representative applications include renewable energy generation, industrial motor drives, and electric propulsion systems. Nevertheless, dc-link neutral-point (NP) voltage imbalance remains a critical challenge, primarily caused by asymmetrical utilization of switching states and the inherent charging/discharging dynamics of the dc-link capacitors. Such an imbalance degrades the quality of the output voltage, increases semiconductor stress, and adversely affects system reliability. Moreover, in the 4L-NPC topology, the intermediate-level switches (Sx2) typically operate at higher switching frequencies than the other switches, leading to increased switching losses and reduced overall efficiency. Therefore, a modulation strategy that simultaneously improves NP voltage balance and reduces the intermediate-device switching frequency is of practical significance.
This paper proposes a hybrid pulse-width modulation (PWM) method that integrates variable-reference modulation with dual-zero-sequence-voltage (DZSV) injection to regulate NP voltage and reduce the switching frequency of intermediate-level devices. First, an analytical model of the neutral-point current is developed to identify the key causes of capacitor voltage imbalance in conventional carrier-overlapped PWM. The analysis indicates that the third-harmonic component of neutral-point current primarily induces triple-frequency voltage ripple, exacerbating voltage imbalance.
To suppress this ripple, a decoupled zero-sequence compensation scheme is introduced that dynamically adjusts the zero-sequence voltage components based on operating parameters, such as the power factor angle and modulation index. This compensation reduces triple-frequency voltage ripple in both upper and lower dc-link capacitors, enhancing NP voltage stability under varying load and frequency conditions. A mathematical model of switching-state evolution is developed, enabling active control of the switching behavior of intermediate-level devices. This control reduces the effective switching frequency of switches (Sx2) by approximately 33.3% without compromising output waveform quality or NP voltage balance.
An experimental platform employing a 4L-ANPC inverter was established, and the proposed VR+DZSV modulation strategy, the traditional variable-reference PWM, and the variable-reference plus zero-sequence voltage (VR+ZSV) methods were compared. The VR+DZSV approach maintains the NP voltage-balancing capability of VR+ZSV while improving the suppression of low-frequency capacitor voltage ripple and NP potential regulation across fundamental frequencies of 0.5 Hz, 5 Hz, and 50 Hz.
Further optimization of the voltage-clamping region, termed VR+DZSV1, improves current harmonic performance at the tested frequencies. Specifically, phase current total harmonic distortion (THD) decreases from 17.83% to 1.69% at 0.5 Hz, and reduces to 1.50% and 1.44% at 5 Hz and 50 Hz, respectively. Although the phase-voltage THD at the fundamental frequency is slightly higher than that of traditional variable-reference PWM, the method effectively balances NP voltage and reduces system switching losses. Moreover, no current oscillations occur under rapid variations in modulation index, indicating favorable dynamic response characteristics.
In summary, the proposed VR+DZSV hybrid PWM method addresses NP voltage imbalance and switching loss challenges in 4L-ANPC inverters. The approach improves NP voltage stability, reduces switching frequency of intermediate-level devices, and enhances system efficiency without degrading output quality. It is a promising solution for high-power conversion applications, particularly in renewable energy systems and industrial motor drives.
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Received: 17 June 2025
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2026, Vol. 41 
