Digital Control Design of High Power 400Hz Inverters
Liu Chunxi1, 4, Ma Weiming2, Sun Chi2, Hu Wenhua3
1. Zhejiang University Hangzhou 310027 China 2. Naval University of Engineering Wuhan 430033 China 3. Huazhong University of Science and Technology Wuhan 430074 China 4. Liaoning Technical University Huludao 125105 China
Abstract:In order to implement digital control in high power medium frequency 400Hz/115V inverters, the delay induced by the processes of sampling, computing and PWM during digital control and its impact on the system performances are analyzed based on two-H-Bridge cascaded topology. The control parameters are designed in the continuous domain design by introduced the equivalent time delay when P+resonant controller are adopted. The discrete simulation on a single-phase 100kVA medium frequency inverter model was presented, and the simulation shows the effectiveness of the proposed scheme. PWM waveforms in the single and double update mode operation are generated simultaneously with a common reference sinusoidal signal and the differences between each fundamental phase and reference signal phase are obtained by DSP and field programmable gate array (FPGA). The results coincide with theoretical analysis.
刘春喜, 马伟明, 孙驰, 胡文华. 大功率400Hz逆变电源数字控制设计[J]. 电工技术学报, 2011, 26(1): 100-107.
Liu Chunxi, Ma Weiming, Sun Chi, Hu Wenhua. Digital Control Design of High Power 400Hz Inverters. Transactions of China Electrotechnical Society, 2011, 26(1): 100-107.
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