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| Influence of Control Network Delay on Output Voltage of SPWM Inverter |
| Zhang Cheng1, Sun Chi2, Ai Sheng2, Hu Liangdeng2, Chen Yulin2 |
| 1. College of Electrical and Electronic Engineering, Huazhong University of Science and Technology Wuhan 430074 China 2. National Key Laboratory for Vessel Integrated Power System Technology, Naval University of Engineering Wuhan 430033 China |
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Abstract Considering the control network delay inherent in the medium-large capacity inverter system, this paper derives the mathematical expression for the output line-to-line voltage of the SPWM inverter system under the conditions of the single-leg delay and the legs’ serial delay, and makes a detailed quantitative analysis and experiment verification of the output line-to-line voltage in the both cases through simulation, The results of the simulation and experiment are basically consistent to the theoretical calculation. The results shows the higher harmonic with an odd multiple of the switching frequency (ωs) and the sub-harmonics with a three multiple of the fundamental frequency (ω1) in sideband appearing due to the introduction of the control network delay. The total harmonic distortion factor(THD) value of the system’s output line-to-line voltage and the amplitude value of main sub-harmonics vary according to the increasing control network delay. The value of the THD are the maximum when the single-leg network delay is 50% of switching period or the legs’ serial network delay is 50%-100% of switching period.
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Received: 17 November 2012
Published: 25 March 2014
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2013, Vol. 28 
